1. Field of the Invention
The present invention relates to an array substrate on which a plurality of layers of thin film patterns are formed, a display device, and a method for manufacturing the array substrate. For example, these are preferably applicable to liquid crystal display devices.
2. Description of the Related Art
Recently, liquid crystal display devices are thin in shape, light in weight, and low in power consumption and are used as a typical display device. As a method for reducing the production cost of liquid crystal display devices, it is effective to reduce a photo lithography step in a production process of an array substrate for forming thin film transistors (hereinafter, referred to as TFT). Here, in one photo lithography step, there is a method called gray tone (hereinafter, referred to as GT) exposure or half tone (hereinafter, referred to as HT) exposure to form: a region which has a resist thickness of a resist left unexposed; a region from which a resist is removed by complete exposure; and a region which has an intermediate resist thickness processed by an intermediate exposure amount which does not completely expose a resist. GT exposure provides an intermediate exposure amount by placing a fine thin film pattern of a resolution limit or less of an exposure apparatus on a photomask. HT exposure provides an intermediate exposure amount by forming a semi-permeable membrane on a photomask. In particular, as described in JP-A-2000-66240 (FIG. 25 to FIG. 30), a method for reducing a photo lithography step is made practicable by performing GT exposure or HT exposure on a channel part of a channel etch type TFT.
In addition, as described in JP-A-2006-41161 (FIG. 4), there is a method which obtains a region having an intermediate resist thickness, by performing a two-stage exposure with a second exposure of an intermediate exposure amount added to a first exposure in one photo lithography step. In JP-A-2006-41161, a drain electrode made of a multilayer film containing Al on the top layer. JP-A-2006-41161 discloses performing the two-stage exposure or the HT exposure on a region from which Al of the top layer of the drain electrode corresponding to a contact hole is removed, in order to control a contact resistance between a pixel electrode and the drain electrode that are made of a conductive oxide film such as ITO.
A photo lithography step has a problem that it is likely to be influenced by photomask accuracy (variation in permeability), illuminance distribution of an exposure apparatus, resist thickness distribution of resist coating, variation in developing, and the like, and an intermediate resist thickness is likely to vary when an intermediate exposure which does not completely expose a resist is performed. However, if the photo lithography step is applied only to a channel part of a TFT as in JP-A-2000-66240, since a type of thin film pattern has the same film composition, variation in the intermediate resist film thickness does not pose such a critical problem. However, when an intermediate exposure is performed on both a contact part of a drain electrode shown in JP-A-2006-41161 and a contact part with wiring, terminal, or electrode having various thin film patterns at the same photo lithography step, heights of various thin film patterns formed on a substrate from the substrate are different from each other due to film compositions on the bottom layer. Accordingly, since a resist film thickness does not become uniform, variation in intermediate resist film thickness is further increased after the photo lithography. As a result, there is a problem that in a region where the intermediate resist film thickness is thin, even a necessary thin film pattern is eliminated in a later etching step. Further, in a region where the intermediate resist film thickness is thick, an unnecessary thin film pattern remains as a remaining film in a later step.